Broadband high IP3 dual channel down converter with fractional n PLL and voltage control, 0.7-3.8GHz | Heisener Electronics
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Broadband high IP3 dual channel down converter with fractional n PLL and voltage control, 0.7-3.8GHz

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Data de postagem: 2023-03-28, Analog Devices Inc.

HMC1190ALP6NE is a high linearity wideband dual-channel down-conversion mixer that integrates a PLL and VCO, optimized for multi-standard receiver applications requiring compact, low-power design. The compact 6x6mm lead-free QFN package is RoHS-compliant. The integrated broadband limited LO amplifier enables HMC1190ALP6NE to achieve unprecedented RF bandwidth of 700 MHz to 3800 MHz, suitable for cellular /3G, LTE/WiMAX/4G applications.


Unlike conventional narrowband downconverter, HMC1190ALP6NE supports high - and low-side LO injection at all RF frequencies. RF and LO input ports match 50 ohm internally. The HMC1190ALP6NE features integrated LO and RF balances, the ability to control IF and LO amplifiers and bias control interfaces to achieve a high linearity passive mixer core. Balanced passive mixers combined with a high linearity IF amplifier architecture provide excellent LO-to-RF, LO-to-IF and RF-to-IF isolation.


Function diagram

                                  



With a low noise factor of 9 dB and a high IIP3 of +24 dBm, the HMC1190ALP6NE can be used for the most demanding applications. External bias control pins can be optimized for 2.34W (typical) low power consumption. Fast enabling control interfaces further reduces power consumption in TDD applications. The external VCO input allows HMC1190ALP6NE to lock the external VCO and provide a cascading LO architecture for MIMO applications.


Two independent charge pump (CP) outputs enable independent loop filters optimized for integrated and external vco and seamlessly switch between integrated or external vco during operation. The programmable RF output phase feature enables further phase adjustment and synchronization of multiple HMC1190ALP6NE scalable MIMO and beamforming radio architectures.


Other features include a configurable LO output muting feature, precision frequency mode that enables HMC1190ALP6NE to generate fractional frequencies with a 0 Hz frequency error, and the ability to synchronously change frequencies without changing the phase of the output signal, improving the efficiency of digital predistortion loops.


HMC1190ALP6NE Phase locked loop VCO block diagram

                                        


Features

● Broadband operation, no external matching

● High - and low-side LO injection operations

● High input IP3 + 24dbm

● Power conversion gain 8.9 dB

● The input P1dB is 11 dBm

● SSB noise graph is 9 dB

● 55dbc channel to channel isolation

● Enable/disable Mixer and PLLVCO separately

● Single-ended RF input interface

● Maximum phase detection rate :100mhz

● Low phase noise: typical frequency band -110 dBc/Hz

● PLL distribution:

   -230 dBc/Hz Integer mode, -227 dBc/Hz fractional mode

   < 180 fs Integrated RMS Jitter (1 kHz to 20 MHz)

● LO Low Noise floor :-165 dBc/Hz

● Mixer Low Noise floor :-161 dBc/Hz

● Integrated VCO

● External VCO input, differential LO output

● Precise frequency mode: 0 Hz fractional frequency error

● Programmable RF output phase

● Frequency change of output phase synchronization

● Output phase synchronization

● Output mute function

● Compact solution in 6x6mm lead-free QFN package


Applications

● Multi-band/multi-standard cellular BTS diversity receiver

● GSM & 3G & LTE/WiMAX/4G

● MIMO Infrastructure Receivers

● Broadband radio receiver

● Multi-band base stations and Repeaters

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